libpfm_intel_tmt(3) — Linux manual page

NAME \| SYNOPSIS \| DESCRIPTION \| MODIFIERS \| OFFCORE_RESPONSE events \| AUTHORS \| COLOPHON

LIBPFM(3)               Linux Programmer's Manual              LIBPFM(3)

NAME top

       libpfm_intel_tmt - support for Intel Tremont core PMU

SYNOPSIS top

       #include <perfmon/pfmlib.h>

       PMU name: tmt
       PMU desc: Intel Tremont

DESCRIPTION top

       The library supports the Intel Tremont core PMU.

MODIFIERS top

       The following modifiers are supported on Intel Tremont
       processors:

       u      Measure at user level which includes privilege levels 1,
              2, 3. This corresponds to PFM_PLM3.  This is a boolean
              modifier.

       k      Measure at kernel level which includes privilege level 0.
              This corresponds to PFM_PLM0.  This is a boolean modifier.

       i      Invert the meaning of the event. The counter will now
              count cycles in which the event is not occurring. This is
              a boolean modifier

       e      Enable edge detection, i.e., count only when there is a
              state transition from no occurrence of the event to at
              least one occurrence. This modifier must be combined with
              a counter mask modifier (m) with a value greater or equal
              to one.  This is a boolean modifier.

       c      Set the counter mask value. The mask acts as a threshold.
              The counter will count the number of cycles in which the
              number of occurrences of the event is greater or equal to
              the threshold. This is an integer modifier with values in
              the range [0:255].

OFFCORE_RESPONSE events top

       Intel Tremont provides two offcore_response events:
       OFFCORE_RESPONSE_0 and OFFCORE_RESPONSE_1. The  OCR event is
       aliased to OFFCORE_RESPONSE_0.

       Those events need special treatment in the performance monitoring
       infrastructure because each event uses an extra register to store
       some settings. Thus, in case multiple offcore_response events are
       monitored simultaneously, the kernel needs to manage the sharing
       of that extra register.

       The offcore_response event is exposed as a normal event by the
       library. The extra settings are exposed as regular umasks. The
       library takes care of encoding the events according for the
       underlying kernel interface.

       On Intel Tremont, it is not possible to combine the request,
       supplier, snoop, fields anymore to avoid invalid combinations. As
       such, the umasks provided by the library are the only ones
       supported and validated.

AUTHORS top

       Stephane Eranian <eranian@gmail.com>

COLOPHON top

       This page is part of the perfmon2 (a performance monitoring
       library) project.  Information about the project can be found at
       ⟨http://perfmon2.sourceforge.net/⟩.  If you have a bug report for
       this manual page, send it to
       perfmon2-devel@lists.sourceforge.net.  This page was obtained
       from the project's upstream Git repository
       ⟨git://git.code.sf.net/p/perfmon2/libpfm4 perfmon2-libpfm4⟩ on
       2024-06-14.  (At that time, the date of the most recent commit
       that was found in the repository was 2024-04-24.)  If you
       discover any rendering problems in this HTML version of the page,
       or you believe there is a better or more up-to-date source for
       the page, or you have corrections or improvements to the
       information in this COLOPHON (which is not part of the original
       manual page), send a mail to man-pages@man7.org

                               March, 2020                     LIBPFM(3)