The library supports any processor implementing the Intel
architectural PMU. This is a minimal PMU with a variable number of
counters but predefined set of events. It is implemented in all
recent processors starting with Intel Core Duo/Core Solo.
It acts as a default PMU support in case the library is run on a very
recent processor for which the specific support has not yet been
The following modifiers are supported on Intel architectural PMU:
u Measure at user level which includes privilege levels 1, 2, 3.
This corresponds to PFM_PLM3. This is a boolean modifier.
k Measure at kernel level which includes privilege level 0. This
corresponds to PFM_PLM0. This is a boolean modifier.
i Invert the meaning of the event. The counter will now count
cycles in which the event is not occurring. This is a boolean
e Enable edge detection, i.e., count only when there is a state
transition. This is a boolean modifier.
c Set the counter mask value. The mask acts as a threshold. The
counter will count the number of cycles in which the number of
occurrences of the event is greater or equal to the threshold.
This is an integer modifier with values in the range [0:255].
t Measure on both threads at the same time assuming hyper-
threading is enabled. This modifier requires at least version
3 of the architectural PMU. This is a boolean modifier.
This page is part of the perfmon2 (a performance monitoring library)
project. Information about the project can be found at
⟨http://perfmon2.sourceforge.net/⟩. If you have a bug report for this
manual page, send it to firstname.lastname@example.org. This
page was obtained from the project's upstream Git repository
⟨git://git.code.sf.net/p/perfmon2/libpfm4⟩ on 2017-03-13. If you dis‐
cover any rendering problems in this HTML version of the page, or you
believe there is a better or more up-to-date source for the page, or
you have corrections or improvements to the information in this
COLOPHON (which is not part of the original manual page), send a mail
September, 2009 LIBPFM(3)